Semiconductor device and manufacturing method thereof

ABSTRACT

Photosensitive insulating films are laminated and formed on lower-layer interconnection layers and a connection hole is formed in the photosensitive insulating film, and a interconnection groove is formed on the photosensitive insulating film. The upper-layer interconnection layers are formed in a manner so as to fill the connection hole and the groove. With this arrangement, it is possible to provide a semiconductor device and a manufacturing method thereof having a multi-layer interconnection structure, which have advantages in that the connection hole and a groove are formed by using a simple process, the yield can be improved and the number of processes and the costs can be reduced.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a semiconductor device and amanufacturing method thereof, and more specifically to a semiconductordevice having a multi-layer interconnection structure for use in anintegrated circuit, and a manufacturing method thereof.

[0003] 2. Description of the Background Art

[0004]FIG. 23 and FIGS. 24 to 30 are schematic cross-sectional viewsthat show the structure of a conventional semiconductor device having amulti-layer interconnection structure and a manufacturing methodthereof, which are described, for example, on page 30 in “ElectronicJournal”, December Issue, 1997.

[0005] Referring to FIG. 23, an etching stopper layer 115 made of, forexample, SiN film (silicon nitride film) is formed on a lower-layerinterconnection 114. On the etching stopper layer 115, an interlayerfilm 101 made of, for example, SiO₂ film (silicon oxide film) is formed.On the upper surface of the interlayer film 101, a groove 102 a that forfilling with interconnection and a connection hole 101 a that reachesthe lower-layer interconnection 114 from the bottom surface of thegroove 102 a are formed.

[0006] A barrier metal 103 made of, for example, TaN (tantalum nitride)film is formed along the inner surface of the connection hole 101 a andthe groove 102 a, and a Cu film 104 is formed so as to be embedded inthe connection hole 101 a and the groove 102 a. The barrier metal 103and the Cu film 104 constitute an upper interconnection.

[0007] Next, an explanation will be given of the manufacturing method ofthe conventional semiconductor device shown in FIG. 23.

[0008] Referring to FIG. 24, the etching stopper layer 115 and theinterlayer film 101 are successively formed on the lower-layerinterconnection 114 by a plasma CVD (Chemical Vapor Deposition) method.

[0009] Referring to FIG. 25, after photoresist has been applied to theinterlayer film 101, this is exposed and developed to form a resistpattern 121 a having a pattern of connection holes.

[0010] Referring to FIG. 26, the interlayer film 101 is subjected to adry etching process using this resist pattern 121 a as a mask. Thus, ahole 101 a that reaches the etching stopper layer 115 is formed in theinterlayer film 101. Thereafter, the resist pattern 121 a is removed byashing and a chemical treatment.

[0011] Referring to FIG. 27, after photoresist has been applied to theinterlayer film 101, this is exposed and developed to form a resistpattern 121 b having a pattern of grooves.

[0012] Referring to FIG. 28, the interlayer film 101 is subjected to adry etching process using this resist pattern 121 b as a mask to form agroove 102 a used for interconnection in the interlayer film 101.Thereafter, the resist pattern 121 b is removed by ashing and a chemicaltreatment.

[0013] Referring to FIG. 29, the etching stopper layer 115 exposed fromthe hole 101 a is removed by the dry etching process so that one portionof the surface of the lower-layer interconnection 114 is exposed.

[0014] Referring to FIG. 30, a barrier metal 103 and a seed layer for aplating film are formed on the interlayer film 101. With respect to thebarrier metal, a TaN film is used, and a Cu film is used as the seedlayer. The TaN film 30 is formed with a thickness of 20 nm by, forexample, a sputtering method, and the Cu film forming the seed layer isformed with a thickness of 200 nm by, for example, a sputtering method.Thereafter, Cu is deposited by an electrolytic plating method in amanner so as to fill the groove 102 a and the connection hole 101 a,thereby forming a Cu film 104.

[0015] Then, the Cu film 104 and the barrier metal 103 are abraded andremoved by a chemical mechanical polishing method (CMP method) until theupper surface of the interlayer film 101 has been exposed, and allowedto remain only in the connection hole 101 a and the groove 102 a so asto form interconnection. The above-mentioned processes are repeated toform multi-layer interconnection.

[0016] Since the conventional semiconductor device having a multi-layerinterconnection structure is designed as described above, the depth ofetching of the hole 101 a has a value that corresponds to the sum of thedepth of the connection hole and the height of the interconnection, asillustrated in FIG. 26. For this reason, upon forming the hole 101 a, anextremely deep etching process is required, and this etching has to bestopped by the thin etching stopper layer 115. Consequently, it is verydifficult to carry out etching on the hole 101 a, with the result that,due to a reduction in the margin of safety of the process, problemsarise in which the etching finishes before the connection hole 101 a hasbeen completely opened, causing an insufficient opening or, in contrast,penetration occurs in the etching layer 115.

[0017] The insufficient opening causes insufficient connection in theconnection hole 101 a. Moreover, the penetration of the etching stopperlayer 115 causes surface oxidation of the lower-layer interconnection114, resulting in an increase in the connection resistance andinsufficient connection. These problems have caused a problem of anextreme reduction in the yield of the multi-layer interconnection.

SUMMARY OF THE INVENTION

[0018] An object of the present invention is to provide a semiconductordevice having a multi-layer structure and a manufacturing methodthereof, which is possible to form a connection hole and a groove byusing a simple process, and consequently to improve the yield as well asto reduce the number of processes and the production costs.

[0019] According to the present invention, there is provided asemiconductor device having a multi-layer interconnection structure inwhich a lower-layer interconnection and an upper-layer interconnectionare laminated with an insulating film interpolated in between, whereinthe insulating film has a groove filled with the upper layerinterconnection on its upper surface, a connection hole for connectingthe upper-layer interconnection and the lower-layer interconnection, anda photosensitive film.

[0020] In accordance with the semiconductor device of the presentinvention, the insulating film has a photosensitive property; therefore,after the insulating film has been exposed, this is developed so that agroove and a connection hole are formed. In this developing process,since only the photosensitive insulating film can be selectivelyremoved, it is possible to prevent penetration through the stopper layerlocated beneath the photosensitive insulating film. Therefore, since thedeveloping time and other conditions can be set without the need oftaking the penetration of the stopper layer into consideration, it ispossible to effectively prevent the insufficient opening. Consequently,it becomes possible to improve the yield and also to reduce the numberof processes and the production costs.

[0021] Here, the photosensitive insulating film of the present inventionrefers to an insulating film whose solubility to a developing solutionchanges from a soluble state to an insoluble state or from an insolublestate to a soluble state, upon irradiation with light or energyparticles.

[0022] In the above-mentioned semiconductor device, the insulating filmpreferably provided has a structure in which a lower-layer insulatingfilm and an upper-layer insulating film that are exposed to mutuallydifferent wavelengths are laminated, and a connection hole is formed inthe lower-layer insulating film and a groove is formed on theupper-layer insulating film.

[0023] With this arrangement, the connection hole and the groove areformed in a separate manner by changing only the wavelength of exposurelight.

[0024] In the above-mentioned semiconductor device, the wavelength towhich the lower-layer insulating film is exposed is set to be shorterthan the wavelength to which the upper-layer insulating film is exposed.

[0025] With this arrangement, it becomes possible to form the connectionhole and the groove by using fewer processes.

[0026] In the above-mentioned semiconductor device, the insulating filmpreferably has a structure in which a lower-layer insulating film and anupper-layer insulating film that have mutually different sensitivitiesare stacked, and a connection hole is formed in the lower-layerinsulating film and a groove is formed in the upper-layer insulatingfilm.

[0027] With this arrangement, it becomes possible to form the connectionhole and the groove in a separate manner by changing only the dose ofexposure.

[0028] In the above-mentioned semiconductor device, the sensitivity thatthe lower-layer insulating film is exposed is set to be lower than thesensitivity that the upper-layer insulating film is exposed.

[0029] With this arrangement, it becomes possible to form the connectionhole and the groove by using fewer processes.

[0030] In the above-mentioned semiconductor device, the insulating filmpreferably has a structure in which a lower-layer insulating film and anupper-layer insulating film that are exposed to mutually differentexposure sources are stacked, and a connection hole is formed in thelower-layer insulating film and a groove is formed on the upper-layerinsulating film.

[0031] With this arrangement, it is possible to form the connection holeand the groove in a separate manner by changing only the exposuresource.

[0032] In the above-mentioned semiconductor device, more preferably, thelower-layer insulating film is exposed to two kinds of exposure sources,and the upper-layer insulating film is exposed to any one of the twokinds of exposure sources.

[0033] With this arrangement, it becomes possible to form the connectionhole and the groove by using fewer processes.

[0034] In the above-mentioned semiconductor device, the insulating filmpreferably has a structure in which a first photosensitive insulatingfilm, an exposure source absorption film and a second photosensitiveinsulating film are stacked in succession, and a connection hole isformed in the first photosensitive insulating film and a groove isformed on the second photosensitive insulating film.

[0035] Since the exposure source absorption film is formed, only thesecond photosensitive insulating film as the upper layer can be exposed,while the first photosensitive insulating film as the lower layer isleft unexposed. Thus, it is possible to form the connection hole and thegroove in a separate manner.

[0036] Here, the exposure source absorption film in the presentinvention refers to an insulating film that has an absorbing body withrespect to light having a specific wavelength or specific energyparticles.

[0037] In the above-mentioned semiconductor device, more preferably, theinsulating film is formed by a single layer.

[0038] Even when the photosensitive insulating film is formed by asingle layer, the connection hole and the groove can be formed in aseparate manner by changing the dose of exposure of the exposure light.

[0039] In the above-mentioned semiconductor device, more preferably, theconnection hole is formed so as to be located only within an area belowthe groove.

[0040] With this arrangement, it is possible to prevent the formationarea of the connection hole from sticking out from the area below thegroove, and consequently to be able to reduce the interconnectionintervals.

[0041] In the above-mentioned semiconductor device, more preferably, thewidth of the groove and the aperture width of the connection hole areset to be virtually the same, and the side wall of the groove and theside wall of the connection hole constitute a virtually continuoussurface.

[0042] With this arrangement, it is possible to prevent the formationarea of the connection hole from sticking out from the area below thegroove, and consequently to reduce the interconnection intervals.

[0043] The manufacturing method of a semiconductor device of the presentinvention, which is a process for manufacturing a semiconductor devicehaving a multi-layer interconnection structure in which a lower-layerinterconnection and an upper-layer interconnection are laminated with aninsulating film interpolated in between, is characterized in that, afterthe insulating film having a photosensitive property has been exposed,this is then developed so that a groove for filling with the upper-layerinterconnection is formed on the upper surface thereof while aconnection hole for connecting the upper-layer interconnection and thelower-layer interconnection is formed below the groove.

[0044] In accordance with the manufacturing method of a semiconductordevice of the present invention, the insulating film has aphotosensitive property; therefore, after the insulating film has beenexposed, this is developed so that a groove and a connection hole areformed. In this developing process, since only the photosensitiveinsulating film can be selectively removed, it is possible to preventpenetration through the stopper layer located beneath the photosensitiveinsulating film. Therefore, since the developing time and otherconditions can be set without the need of taking the penetration of thestopper layer into consideration, it is possible to effectively preventthe insufficient opening. Consequently, it becomes possible to improvethe yield and also to reduce the number of processes and the productioncosts.

[0045] In the above-mentioned manufacturing method of a semiconductordevice, the insulating film is preferably formed to a structure in whicha lower-layer insulating film and an upper-layer insulating film thatare exposed to mutually different wavelengths are laminated, and thelower-layer insulating film is exposed by a first wavelength to form aconnection hole therein, and the upper-layer insulating film is exposedby a second wavelength that is different from the first wavelength toform a groove therein.

[0046] With this arrangement, the connection hole and the groove areformed in a separate manner by changing only the wavelength of exposurelight.

[0047] In the above-mentioned manufacturing method of a semiconductordevice, more preferably, the first wavelength is shorter than the secondwavelength.

[0048] With this arrangement, it becomes possible to form the connectionhole and the groove by using fewer processes.

[0049] In the above-mentioned manufacturing method of a semiconductordevice, the insulating film is preferably formed to a structure in whicha lower-layer insulating film and an upper-layer insulating film thathave mutually different sensitivities are stacked, and the lower-layerinsulating film is exposed by a first dose of exposure to form aconnection hole therein, and the upper-layer insulating film is exposedby a second dose of exposure that is different from the first dose ofexposure to form a groove therein.

[0050] With this arrangement, it becomes possible to form the connectionhole and the groove in a separate manner by changing only the dose ofexposure.

[0051] In the above-mentioned manufacturing method of a semiconductordevice, more preferably, the first dose of exposure is greater than thesecond dose of exposure.

[0052] With this arrangement, it becomes possible to form the connectionhole and the groove by using fewer processes.

[0053] In the above-mentioned manufacturing method of a semiconductordevice, the insulating film is preferably formed to a structure in whicha lower-layer insulating film and an upper-layer insulating film thatare exposed to mutually different exposure sources are stacked, and thelower-layer insulating film is exposed by a first exposure source toform a connection hole therein, and the upper-layer insulating film isexposed by a second exposure source that is different from the firstexposure source to form a groove therein.

[0054] With this arrangement, it is possible to form the connection holeand the groove in a separate manner by changing only the exposuresource.

[0055] In the above-mentioned manufacturing method of a semiconductordevice, the insulating film is preferably formed to a structure in whicha first photosensitive insulating film, an exposure source absorptionfilm and a second photosensitive insulating film are laminated insuccession, and a first exposure forms a connection hole in the firstphotosensitive insulating film and a second exposure forms a groove onthe second photosensitive insulating film.

[0056] Since the exposure source absorption film is formed, only thesecond photosensitive insulating film as the upper layer can be exposed,while the first photosensitive insulating film as the lower layer isleft unexposed. Thus, it is possible to form the connection hole and thegroove in a separate manner.

[0057] In the above-mentioned manufacturing method of a semiconductordevice, more preferably, the insulating film is formed by a singlephotosensitive insulating film.

[0058] With this arrangement, it is possible to simplify the structureand the manufacturing processes.

[0059] In the above-mentioned manufacturing method of a semiconductordevice, more preferably, the single photosensitive insulating film isexposed by a first dose of exposure to form a connection hole therein,and the single photosensitive insulating film is also exposed by asecond dose of exposure that is different from the first dose ofexposure to form a groove therein.

[0060] With this arrangement, the groove and the hole can be formed evenin the single photosensitive insulating film.

[0061] In the above-mentioned manufacturing method of a semiconductordevice, more preferably, the first dose of exposure is greater than thesecond dose of exposure.

[0062] With this arrangement, the connection hole and the groove can beformed by using fewer processes.

[0063] In the above-mentioned manufacturing method of a semiconductordevice, more preferably, the exposing process for the groove and theexposing process for the connection hole are carried out at the sametime.

[0064] With this arrangement, the connection hole and the groove can beformed by using fewer processes, and it is possible to form a structurein which the groove and the connection hole are completely overlappedwith each other, and consequently to be able to narrow the intervals ofthe interconnections.

[0065] In the above-mentioned manufacturing method of a semiconductordevice, more preferably, the exposing process for the groove and theexposing process for the connection hole are carried out at the sametime so that the connection hole is formed so as to be located only at aposition within an area below the groove.

[0066] With this arrangement, it is possible to prevent the formationarea of the connection hole from sticking out from the area below thegroove, and consequently to reduce the interconnection intervals.

[0067] In the above-mentioned manufacturing method of a semiconductordevice, more preferably, the width of the groove and the aperture widthof the connection hole are set to be virtually the same, and the sidewall of the groove and the side wall of the connection hole constitute avirtually continuous surface.

[0068] With this arrangement, it is possible to prevent the formationarea of the connection hole from sticking out from the area below thegroove, and consequently to be able to reduce the interconnectionintervals.

[0069] The foregoing and other objects, features, aspects and advantagesof the present invention will become more apparent from the followingdetailed description of the present invention when taken in conjunctionwith the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0070]FIG. 1 is a schematic cross-sectional view that shows a structureof a semiconductor device in accordance with a first embodiment of thepresent invention;

[0071]FIGS. 2 through 6 are schematic cross-sectional views that show asequence of processes of a manufacturing method of the semiconductordevice in accordance with the first embodiment of the present invention;

[0072]FIGS. 7A and 7B are schematic cross-sectional views that showstructures of via hole chains manufactured by the method of the firstembodiment and a conventional method;

[0073]FIG. 8 is a schematic cross-sectional view that shows a structureof a semiconductor device in accordance with a fourth embodiment of thepresent invention;

[0074]FIGS. 9 through 13 are schematic cross-sectional views that show asequence of processes of a manufacturing method of the semiconductordevice in accordance with the fourth embodiment of the presentinvention;

[0075]FIG. 14 is a schematic cross-sectional view that shows a structureof a semiconductor device in accordance with a fifth embodiment of thepresent invention;

[0076]FIGS. 15 through 19 are schematic cross-sectional views that showa sequence of processes of a manufacturing method of the semiconductordevice in accordance with a fifth embodiment of the present invention;

[0077]FIG. 20 is a drawing that shows the relationship between the doseof exposure and the depth of exposure;

[0078]FIG. 21 is a plan view that explains the fact that the structureof the conventional semiconductor device requires an alignment margin;

[0079]FIG. 22 is a plan view that explains the fact the structure of thesemiconductor device of a sixth embodiment of the present inventioneliminates the necessity of the alignment margin;

[0080]FIG. 23 is a schematic cross-sectional view that shows thestructure of a conventional semiconductor device; and

[0081]FIGS. 24 through 30 are schematic cross-sectional views that showa sequence of processes of a manufacturing method of the conventionalsemiconductor device.

[0082]FIG. 31 is schematic cross-sectional views that show a structureof via hole chains manufactured by the method of the fourth embodiment.

[0083]FIG. 32 is schematic cross-sectional views that show a structureof via hole chains manufactured by the method of the fifth embodiment.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0084] Referring to Figures, the following description will discusspreferred embodiments of the present invention.

(First Embodiment)

[0085] Referring to FIG. 1, an interlayer insulating film 11 is formedon a semiconductor substrate or a lower-layer interlayer film 16. Agroove 11 a is formed on the upper surface of the interlayer insulatingfilm 11, and a lower-layer interconnection constituted by a barriermetal 13 and a Cu film 14 is filled in into the groove 11 a. A stopperlayer 15 made of, for example, SiN is formed on the lower-layerinterconnections 13, 14, with a thickness of 100 nm. Photosensitiveinsulating layers 1 and 2 are laminated on this stopper layer 15.

[0086] Each of the photosensitive insulating films 1 and 2 is made froma material such as a photosensitive SOG material PS-MSZ (hereinafter,referred to as PS-MSZ) made by Crarient Co., Ltd. The PS-MSZ is formedby adding a photoacid generating agent to methylsilazane as aphotosensitive agent. The photosensitive insulating film 1 contains aphotosensitive agent that is exposed to, for example, KrF excimer laser(wavelength:248 nm), and the photosensitive insulating film 2 contains aphotosensitive agent that is exposed to, for example, i rays(wavelength:365 nm). Each of the photosensitive insulating films 1 and 2has a film thickness of, for example, 1 μm.

[0087] Here, since the photosensitive agent absorbs light having notless than a certain quantity of energy and is allowed to react, thephotosensitive agent exposed to i rays is also exposed to the KrFexcimer laser.

[0088] A interconnection groove 2 a is formed in the photosensitiveinsulating film 2, and a connection hole 1 a is formed in thephotosensitive insulating film 1 below the groove 2 a. A barrier metal 3is formed on the inner surfaces of the connection hole 1 a and thegroove 2 a, and a Cu film 4 is formed so as to be filled in into theconnection hole 1 a and the groove 2 a. The barrier metal 3 and the Cufilm 4 constitute an upper-layer interconnection. The upper surfaces ofthe upper-layer interconnections 3 and 4 are virtually the same planewith the upper surface of the photosensitive insulating film 2.

[0089] The following description will discuss a manufacturing method ofthe present embodiment.

[0090] Referring to FIG. 2, first, a semiconductor substrate or alower-layer interlayer film 16, an interlayer insulating film 11 andlower interconnections 13, 14 are formed. Each of the lower-layer-layerinterconnections 13, 14 is formed by, for example, a barrier metal 13and a Cu film 14. A stopper layer 15 is formed on the lower-layerinterconnections 13, 14 by, for example, a plasma CVD method.Photosensitive insulating films 1 and 2 are successively formed on thestopper layer 15 by coating, and this is then pre-baked. Each of thephotosensitive insulating films 1 and 2 is formed by, for example, theabove-mentioned material, PS-MSZ, with a thickness of, for example, 1μm.

[0091] Referring to FIG. 3, a pattern of a connection hole 1 a istransferred on the photosensitive insulating films 1 and 2, anddeveloped thereon to form the connection hole 1 a. At this time, thetransferring process is carried out by using, for example, KrF excimerlaser. For this reason, both of the photosensitive insulating films 1and 2 are exposed so that the pattern of the connection hole 1 a can betransferred thereon.

[0092] Referring to FIG. 4, a pattern of a groove 2 a is transferredonto the photosensitive insulating film 2, and developed thereon to formthe interconnection groove 2 a. At this time, the transferring processis carried out by using, for example, i rays. Here, only thephotosensitive insulating film 2 is exposed to the i rays, while thephotosensitive insulating film 1 is not exposed thereto; thus, it ispossible to transfer the pattern of the interconnection groove 2 a onlyon the photosensitive insulating film 2.

[0093] Referring to FIG. 5, the stopper layer 15 exposed from theconnecting hole 1 a is removed by dry etching. Thus, one portion of thesurface of the lower-layer interconnections 13, 14 is exposed.

[0094] Referring to FIG. 6, a TaN film is formed on the photosensitiveinsulating films 1 and 2 as the barrier metal 3, and a Cu film 4 isformed on the TaN film. The TaN film 3 is formed by, for example,sputtering with a thickness of 20 nm. For example, the Cu film 4 isformed as follows: after a Cu seed layer has been formed by sputteringwith a thickness of 200 nm, Cu is deposited on the seed layer by anelectrolytic plating method. The connection hole 1 a and the groove 2 aare filled with the Cu film 4. With respect to a solution for theelectrolytic plating, for example, a copper sulfate bath is used.

[0095] Thereafter, the Cu film 4 and the barrier metal 3 are abraded andremoved by the CMP method until the upper surface of the photosensitiveinsulating film 2 has been exposed so that these are only allowed toremain in the connection hole 1 a and the groove 2 a, thereby formingupper-layer interconnections 3, 4. The above-mentioned processes arerepeated so that multi-layer interconnection is formed.

[0096] By using the method as described above, via chains as shown inFIG. 7A were formed. For reference purposes, a via chain as shown inFIG. 7B was formed by a conventional method in the same manner. Thenumber of via holes of the via hole chain was set to 3000, and the viadiameter was set to 0.4 μm. Table 1 shows the yield and dispersion ofresistance. TABLE 1 Yield and dispersion of resistance of via hole chainYield Dispersion of resistance Present Embodiment 100%  6% ConventionalExample  87% 14%

[0097] The results show that the manufacturing method of the presentembodiment is superior to the conventional example both in the yield anddispersion of resistance (standard deviation/average value).

[0098] Here, the present embodiment has exemplified a case in which theconnection hole 1 a is formed prior to the formation of theinterconnection groove 2 a; however, the interconnection groove 2 a maybe formed prior to the connection hole 1 a, and even in this case, thesame effects as described above can be obtained. Moreover, the same istrue for the second to sixth embodiments which will be described below.

[0099] Here, the present embodiment has exemplified a case in which thestopper layer 15 is formed on the lower-layer interconnection; however,the stopper layer 15 may be omitted, and even in this case, the sameeffects as described above can be obtained. Moreover, the same is truefor embodiments which will be described below.

(Second Embodiment)

[0100] The first embodiment has exemplified a case in which thephotosensitive insulating films 1 and 2 that are exposed to mutuallydifferent wavelengths are used; however, the photosensitive insulatingfilms 1 and 2 that have mutually different sensitivities may be used.Referring to FIGS. 1 to 6, the following description will discuss thesecond embodiment in which the photosensitive insulating films 1 and 2that have mutually different sensitivities are used.

[0101] Referring to FIG. 1, in comparison with the first embodiment, thestructure of the present embodiment is different in the structures ofthe photosensitive insulating films 1 and 2. The materials ofphotosensitive insulating films 1 and 2 are, for example, PS-MSZ, andeach film thickness is set to, for example, 1 μm. Here, the sensitivityof the photosensitive insulating film 1 is set to be lower than thesensitivity of the photosensitive insulating film 2. The sensitivity ofeach photosensitive insulating film is controlled by changing the amountof the photosensitive agent in the insulating film. Table 2 shows therelationship between the sensitivity and the amount of thephotosensitive agent. TABLE 2 Amount of photosensitive agent andsensitivity thereof Amount of photosensitive agent 12.5 20 25 50 75 100(mass %) Appropriate dose of exposure 32.4 24.2 20 13.4 9.8  8 (μC/cm²)

[0102] Since the other structures except for these are virtually thesame as the structures of the first embodiment, the same members areindicated by the same reference numbers, and the description thereof isomitted.

[0103] Next, an explanation will be given of the manufacturing method ofthe present embodiment.

[0104] Referring to FIG. 2, a semiconductor substrate or a lower-layerinterlayer film 16, an interlayer insulating film 11 and lower-layerinterconnections 13, 14 are formed in the same manner as the firstembodiment. A stopper layer 15 is formed on the lower-layerinterconnections 13, 14 by, for example, a plasma CVD method.Photosensitive insulating films 1 and 2 are successively formed on thestopper layer 15 by coating, and then pre-baked. Each of thephotosensitive insulating films 1 and 2 is formed by, for example,PS-MSZ, with a thickness of, for example, 1 μm. Here, the sensitivity ofthe photosensitive insulating film 1 is set to be lower than thesensitivity of the photosensitive insulating film 2 by changing theamount of the photosensitive agent in the insulating film.

[0105] Referring to FIG. 3, a pattern of a connection hole 1 a istransferred on the photosensitive insulating films 1 and 2, anddeveloped thereon to form the connection hole 1 a. In this transferringprocess, the exposure is carried out by using i rays. By increasing thedose of exposure, not only the second photosensitive insulating film 2,but also the first photosensitive insulating film 1 having a lowersensitivity can be exposed.

[0106] Referring to FIG. 4, a pattern of a interconnection groove 2 a istransferred on the photosensitive insulating film 2, and developedthereon to form the interconnection groove 2 a. In this transferringprocess, the exposure is carried out by using i rays, and at this time,the dose of exposure is set to be smaller in conformity with thephotosensitive insulating film 2 having the higher sensitivity so thatthe photosensitive insulating film 1, placed as the lower layer, is notexposed.

[0107] Referring to FIG. 5, the stopper layer 15 exposed from theconnecting hole 1 a is removed by dry etching. Thus, one portion of thesurface of the lower-layer interconnections 13, 14 is exposed.

[0108] Referring to FIG. 6, a barrier metal 3 made of a TaN film and aCu film 4 are formed in the same manner as the first embodiment, andthese are then abraded and removed by the CMP method, thereby formingupper-layer interconnections 3, 4 as shown in FIG. 1. Theabove-mentioned processes are repeated so that multi-layerinterconnection is formed.

[0109] By using the method as described above, via hole chains as shownin FIG. 7A were formed. For reference purposes, a via hole chain asshown in FIG. 7B was formed by a conventional method in the same manner.The number of via holes of the via hole chain was set to 3000, and thevia diameter was set to 0.4 μm. Table 3 shows the yield and dispersionof resistance. TABLE 3 Yield and dispersion of resistance of via holechain Yield Dispersion of resistance Present Embodiment 100%  4%Conventional Example  87% 14%

[0110] The results show that the manufacturing method of the presentembodiment is superior to the conventional example both in the yield anddispersion of resistance (standard deviation/average value).

[0111] In comparison with the first embodiment, since the presentembodiment uses only one kind of a transferring-use stepper, it isadvantageous in terms of costs.

(Third Embodiment)

[0112] The first embodiment has exemplified a case in which thephotosensitive insulating films 1 and 2 that are exposed to mutuallydifferent wavelengths are used; however, the photosensitive insulatingfilms 1 and 2 that are exposed to mutually different exposing sourcesmay be used. Referring to FIGS. 1 to 6, the following description willdiscuss the third embodiment in which the photosensitive insulatingfilms 1 and 2 that are exposed to mutually different exposing sourcesare used.

[0113] Referring to FIG. 1, in comparison with the first embodiment, thestructure of the present embodiment is different in the structures ofthe photosensitive insulating films 1 and 2. The material of thephotosensitive insulating film 1 is, for example, a resin of anon-chemical amplification type that is only exposed to electron beam,and the material of the photosensitive insulating film 2 is, forexample, PS-MSZ. The photosensitive agent contained in thephotosensitive insulating film 2 is exposed to a KrF excimer laser, andalso exposed to electron beams.

[0114] In the phenomenon in which exposure is made by a KrF excimerlaser, a photosensitive agent absorbs light having its specificwavelength, and excited. In contrast, the electron beam excites the bondof atoms so that the photosensitive agent is excited in the same manner.Since the energy is greater than a threshold value of energy requiredfor allowing the photosensitive agent to react, the reaction progresses.In the resin of the non-chemical amplification type used in thephotosensitive insulating film 1, the electron beam excites the atomicbond of molecules constituting the resin and cuts so that the reactionprogresses. However, since the resin of the non-chemical amplificationtype has no property for absorbing the wavelength of KrF excimer laser,it is not exposed to the light.

[0115] Since the other structures except for these are virtually thesame as the structures of the first embodiment, the same members areindicated by the same reference numbers, and the description thereof isomitted.

[0116] Next, an explanation will be given of the manufacturing method ofthe present embodiment.

[0117] Referring to FIG. 2, a semiconductor substrate or a lower-layerinterlayer film 16, an interlayer insulating film 11 and lower-layerinterconnections 13, 14 are formed in the same manner as the firstembodiment. A stopper layer 15 is formed on the lower-layerinterconnections 13, 14 by, for example, a plasma CVD method.Photosensitive insulating films 1 and 2 are successively formed on thestopper layer 15 by coating, and then pre-baked. Each of thephotosensitive insulating films 1 and 2 is formed with a thickness of,for example, 1 μm. As described above, the photosensitive insulatingfilm 1 is made from a resin of the non-chemical amplification type thatis exposed to, for example, electron beams alone, and the photosensitiveinsulating film 2 is made from, for example, PS-MSZ.

[0118] Referring to FIG. 3, a pattern of a connection hole 1 a istransferred on the photosensitive insulating films 1 and 2, anddeveloped thereon to form the connection hole 1 a. In this transferringprocess, the exposure is carried out by using an electron beam.

[0119] Referring to FIG. 4, a pattern of a interconnection groove 2 a istransferred on the photosensitive insulating film 2, and developedthereon to form the interconnection groove 2 a. In this transferringprocess, the exposure is carried out by using a KrF excimer stepper sothat only the photosensitive insulating film 2 is exposed.

[0120] Referring to FIG. 5, the stopper layer 15 exposed from theconnecting hole 1 a is removed by dry etching. Thus, one portion of thesurface of the lower-layer interconnections 13, 14 is exposed.

[0121] Referring to FIG. 6, a barrier metal 3 made of a TaN film and aCu film 4 are formed in the same manner as the first embodiment, andthese are then abraded and removed by the CMP method, thereby formingupper-layer processes are repeated so that multi-layer interconnectionis formed.

[0122] By using the method as described above, via hole chains as shownin FIG. 7A were formed. For reference purposes, a via hole chain asshown in FIG. 7B was formed by a conventional method in the same manner.The number of via holes of the via hole chain was set to 3000, and thevia diameter was set to 0.4 μm. Table 4 shows the yield and dispersionof resistance. TABLE 4 Yield and dispersion of resistance of via holechain Yield Dispersion of resistance Present Embodiment 100%  4%Conventional Example  87% 14%

[0123] The results show that the manufacturing method of the presentembodiment is superior to the conventional example both in the yield anddispersion of resistance (standard deviation/average value).

[0124] In comparison with the first embodiment, the present embodimenthas an advantage in that even fine patterns can be used therein.

(Fourth Embodiment)

[0125] The third embodiment has exemplified a case in which thephotosensitive insulating films 1 and 2 that are exposed to mutuallydifferent exposure sources are used; however, the same photosensitiveinsulating films 1 and 2 may be used. Referring to FIGS. 8 to 13, thefollowing description will discuss the fourth embodiment in which thesame photosensitive insulating films 1 and 2 are used.

[0126] Referring to FIG. 8, the structure of the present embodiment isdifferent from the structure of the third embodiment in that thephotosensitive insulating films 1 and 2 are made from the same materialand in that an absorbing film 5 to an exposure source is interpolatedbetween the photosensitive insulating films 1 and 2. The material of thephotosensitive insulating films 1 and 2 is, for example, PS-MSZ, and thefilm thickness thereof is set to, for example, 1 μm. Both of thephotosensitive insulating films 1 and 2 are exposed to a KrF excimerlaser, and also exposed to electron beams. Moreover, the absorbing film5 to the exposure source is made from a material, such as Ta (tantalum)oxide, with a film thickness of 50 nm.

[0127] Since the other structures except for these are virtually thesame as the structures of the third embodiment, the same members areindicated by the same reference numbers, and the description thereof isomitted.

[0128] Next, an explanation will be given of the manufacturing method ofthe present embodiment.

[0129] Referring to FIG. 9, a semiconductor substrate or a lower-layerinterlayer film 16, an interlayer insulating film 11 and lower-layerinterconnections 13, 14 are formed in the same manner as the firstembodiment. A stopper layer 15 is formed on the lower-layerinterconnections 13, 14 by, for example, a plasma CVD method. Aphotosensitive insulating film 1 is formed on the stopper layer 15 bycoating, and then pre-baked. On this photosensitive insulating film 1,for example, a Ta oxide, which serves as an absorbing film 5 to theexposure source, is formed by a sputtering method with a thickness of 50nm. On this absorbing film 5, a photosensitive insulating film 2 isformed by coating, and then pre-baked. Each of the photosensitiveinsulating films 1 and 2 has a film thickness of, for example, 1 μm, andthe material is, for example, PS-MSZ.

[0130] Referring to FIG. 10, a pattern of a connection hole 1 a istransferred on the photosensitive insulating films 1 and 2, anddeveloped thereon to form the connection hole 1 a. In this transferringprocess, the exposure is carried out by a KrF excimer laser.

[0131] Referring to FIG. 11, a pattern of a interconnection groove 2 ais transferred on the photosensitive insulating film 2, and developedthereon to form the interconnection groove 2 a. In this transferringprocess, the exposure is carried out by an electron beam. The electronbeam is absorbed and reflected by the absorbing film 5 that is formedbetween the photosensitive insulating film 1 and the photosensitiveinsulating film 2. For this reason, only the photosensitive insulatingfilm 2 is exposed, while the photosensitive insulating film 1 is leftunexposed.

[0132] Referring to FIG. 12, the stopper layer 15 exposed from theconnecting hole 1 a is removed by dry etching. Thus, one portion of thesurface of the lower-layer interconnections 13, 14 is exposed.

[0133] Referring to FIG. 13, a barrier metal 3 made of a TaN film and aCu film 4 are formed in the same manner as the first embodiment, andthese are then abraded and removed by the CMP method, thereby formingupper-layer interconnections 3, 4 as shown in FIG. 8. Theabove-mentioned processes are repeated so that multi-layerinterconnection is formed.

[0134] By using the method as described above, via hole chains as shownin FIG. 31 were formed. For reference purposes, a via hole chain asshown in FIG. 7B was formed by a conventional method in the same manner.The number of via holes of the via hole chain was set to 3000, and thevia diameter was set to 0.4 μm. Table 5 shows the yield and dispersionof resistance. TABLE 5 Yield and dispersion of resistance of via holechain Yield Dispersion of resistance Present Embodiment 100%  7%Conventional Example  87% 14%

[0135] The results show that the manufacturing method of the presentembodiment is superior to the conventional example both in the yield anddispersion of resistance (standard deviation/average value).

[0136] In comparison with the first to third embodiments, since thepresent embodiment uses the same photosensitive insulating films 1 and2, it is advantageous in terms of costs.

[0137] The present embodiment has exemplified a case in which the KrFexcimer laser is used as an exposure source for the connection hole 1 a,the electron beam is used as an exposure source for the interconnectiongroove 2 a and the Ta oxide is used as the absorbing film 5; however,the same effects can be obtained even in the case when a film forabsorbing the exposure source for the interconnection groove 2 a is usedas the absorbing film 5. For example, SiON is used as the absorbing film5, the electron beam is used as the exposure source for the connectionhole 1 a, and the KrF excimer laser is used as the exposure source forthe interconnection groove 2 a; thus, the same effects can be obtained.In this case, SiON is controlled in its compositions of O and N so as toabsorb the waveform of the KrF excimer laser. Moreover, the elementsconstituting SiON are light elements so that the electron beam isallowed to easily pass through them.

(Fifth Embodiment)

[0138] The first embodiment has exemplified a case in which two kinds ofthe photosensitive insulating films 1 and 2 are laminated; however, thephotosensitive insulating film may be formed as a single layer.Referring to FIGS. 14 to 19, the following description will discuss thefifth embodiment in which the single photosensitive insulating film isused.

[0139] Referring to FIG. 14, in comparison with the structure of thefirst embodiment, the structure of the present invention is different inits structure of the photosensitive insulating film. The photosensitiveinsulating film 1 is formed as a single photosensitive insulating filmmade from, for example, PS-MSZ, and its film thickness is set to, forexample, 2 μm.

[0140] Since the other structures except for these are virtually thesame as the structures of the first embodiment, the same members areindicated by the same reference numbers, and the description thereof isomitted.

[0141] Next, an explanation will be given of the manufacturing method ofthe present embodiment.

[0142] Referring to FIG. 15, a semiconductor substrate or a lower-layerinterlayer film 16, an interlayer insulating film 11 and lower-layerinterconnections 13, 14 are formed in the same manner as the firstembodiment. A stopper layer 15 is formed on the lower-layerinterconnections 13, 14 by, for example, a plasma CVD method. Aphotosensitive insulating film 1 is formed on the stopper layer 15 bycoating, and this is then pre-baked. The photosensitive insulating film1 has a thickness of, for example, 2 μm, and the material is, forexample, PS-MSZ.

[0143] Referring to FIG. 16, a pattern of a connection hole 1 a istransferred on the photosensitive insulating film 1, and developedthereon to form the connection hole 1 a. In this transferring process,the exposure is carried out by an electron beam. At this time, the doseof exposure is made greater so that the photosensitive insulating film 1having the thickness of 2 μm is exposed entirely in its thicknessdirection.

[0144] Referring to FIG. 17, a pattern of a groove 2 a is transferred onthe photosensitive insulating film 1, and developed thereon to form theinterconnection groove 2 a. In this transferring process, the dose ofexposure is made smaller so that only the upper side of thephotosensitive insulating film 1 is exposed, while the lower side isleft unexposed.

[0145]FIG. 20 shows the relationship between the dose of exposure andthe exposure depth. It is possible to finely control the dose ofexposure by using the electron beam as the exposure source.

[0146] Referring to FIG. 18, the stopper layer 15 exposed from theconnecting hole 1 a is removed by dry etching. Thus, one portion of thesurface of the lower-layer interconnections 13, 14 is exposed.

[0147] Referring to FIG. 19, a barrier metal 3 made of a TaN film and aCu film 4 are formed in the same manner as the first embodiment, andthese are then abraded and removed by the CMP method, thereby formingupper-layer interconnections 3, 4 as shown in FIG. 14. Theabove-mentioned processes are repeated so that multi-layerinterconnection is formed.

[0148] By using the method as described above, via hole chains as shownin FIG. 32 were formed. For reference purposes, a via hole chain asshown in FIG. 7B was formed by a conventional method in the same manner.The number of via holes of the via hole chain was set to 3000, and thevia diameter was set to 0.4 μm. Table 6 shows the yield and dispersionof resistance. TABLE 6 Yield and dispersion of resistance of via holechain Yield Dispersion of resistance Present Embodiment 100%  8%Conventional Example  87% 14%

[0149] The results show that the manufacturing method of the presentembodiment is superior to the conventional example both in the yield anddispersion of resistance (standard deviation/average value).

[0150] Moreover, in comparison with the first to fourth embodiments,since the present embodiment requires the coating process only once, itis advantageous in terms of costs.

(Sixth Embodiment)

[0151] The first to fifth embodiments have exemplified cases in whichthe groove 2 a and the connection hole 1 a are formed in respectivelyseparate exposing processes; however, these may be formed in the sameexposing process. The following description will discuss the sixthembodiment in which the simultaneous exposing process is carried out.

[0152] Since the structure of the semiconductor device in accordancewith the present embodiment is virtually the same as the structures ofthe second embodiment explained by reference to FIG. 1, the descriptionthereof is omitted.

[0153] Next, an explanation will be given of the manufacturing method ofthe present embodiment.

[0154] Referring to FIG. 2, a semiconductor substrate or a lower-layerinterlayer film 16, an interlayer insulating film 11 and lower-layerinterconnections 13, 14 are formed in the same manner as the firstembodiment. A stopper layer 15 is formed on the lower-layerinterconnections 13, 14 by, for example, a plasma CVD method.Photosensitive insulating films 1 and 2 are successively formed on thestopper layer 15 by coating, and this is then pre-baked. Each of thephotosensitive insulating films 1 and 2 is formed by, for example,PS-MSZ, with a thickness of, for example, 1 μm. Here, the sensitivity ofthe photosensitive insulating film 1 is set to be lower than thesensitivity of the photosensitive insulating film 2. The sensitivity ofthe photosensitive insulating layer is controlled by changing the amountof the photosensitive agent in the insulating film, as described in thesecond embodiment.

[0155] Referring to FIG. 4, a pattern of a connection hole 1 a and apattern of a groove 2 a are simultaneously exposed. This exposure iscarried out by an electron beam, and in the groove 2 a portion, only thephotosensitive insulating film 2 is exposed by reducing the dose ofexposure, while in the hole 1 a portion, both of the photosensitiveinsulating films 1 and 2 are exposed by increasing the dose of exposure.A data setting is carried out by inputting image-forming data of theelectron beam and respective data of the hole 1 a and groove 2 a so asto make the dose of exposure greater at the connection hole 1 a portion;thus, it becomes possible to expose the connection hole 1 a and groove 2a through the exposing process performed only once.

[0156] Referring to FIG. 5, the stopper layer 15 exposed from theconnecting hole 1 a is removed by dry etching. Thus, one portion of thesurface of the lower-layer interconnections 13, 14 is exposed.

[0157] Referring to FIG. 6, a barrier metal 3 made of a TaN film and aCu film 4 are formed in the same manner as the first embodiment, andthese are then abraded and removed by the CMP method, thereby formingupper-layer interconnections 3, 4 as shown in FIG. 1. Theabove-mentioned processes are repeated so that multi-layerinterconnection is formed.

[0158] By using the method as described above, via hole chains as shownin FIG. 7A were formed. For reference purposes, a via hole chain asshown in FIG. 7B was formed by a conventional method in the same manner.The number of via holes of the via hole chain was set to 3000, and thevia diameter was set to 0.4 μm. Table 7 shows the yield and dispersionof resistance. TABLE 7 Yield and dispersion of resistance of via holechain Yield Dispersion of resistance Present Embodiment 100%  3%Conventional Example  87% 14%

[0159] The results show that the manufacturing method of the presentembodiment is superior to the conventional example both in the yield anddispersion of resistance (standard deviation/average value).

[0160] Moreover, in comparison with the first to fifth embodiments,since the present invention requires the transferring process only once,it is advantageous in terms of costs.

[0161] Moreover, as illustrated in FIG. 21, in the conventional method,upon transferring the connection hole 1 a, the pattern of the connectionhole la needs to be aligned with respect to the pattern of the groove 2a, with the result that a margin has to be placed between the intervalsof the grooves 2 a by taking into consideration alignment errors.

[0162] In contrast, in the method of the present embodiment, since thepatterns of the connection hole 1 a and the groove 2 a aresimultaneously transferred, it is not necessary to provide the alignmentprocess for the pattern of the groove 2 a upon transferring the patternof the connection hole 1 a. Therefore, as illustrated in FIG. 22, noalignment margin is required, thereby making it possible to reduce theinterconnection intervals.

[0163] Here, in the structure as shown in FIG. 22, since the exposure ofthe groove 2 a and the exposure of the connection hole 1 a aresimultaneously carried out, the connection hole 1 a is formed so as tobe positioned only within an area below the groove 2 a. Moreover, thewidth of the groove 2 a and the aperture width of the connection hole 1a are virtually the same so that the side wall of the groove 2 a and theside wall of the connection hole 1 a constitute a virtually continuoussurface.

[0164] Here, the present embodiment has exemplified a case in which thephotosensitive insulating films 1 and 2 having mutually differentsensitivities are laminated; however, as described in the fifthembodiment, the photosensitive insulating film having a single layer maybe used.

[0165] Moreover, with respect to the material for the photosensitiveinsulating film constituted by a single layer or not less than twolayers in the first to sixth embodiments, materials listed in thefollowing Table may be adopted. TABLE 8 Trade name Manufacturer Lightsource Probelec-8071 Vantico i rays XP9500CC Shipley i raysV259PA(SAMPLE) Shinnittetsu Chemical i rays SU-08 Mac Demid i rays, EBPHOTONEATH Toray i rays PL-H708,2708,2720,2731 Hitachi Chemical du Ponti rays HD-4000,6000,8000,5100 Microsystem BCB Dow Chemical g, i raysPS-MSZ Clariant Japan i rays, KrF, FB OEBR1000(PGMA) Tokyo AppliedChemical EB COP Chisso EB SAL-601,-605 Shipley EB RE-4210N HitachiChemical EB OEBR1000(PMMA) Tokyo Applied Chemical EB PBS Chisso EBRE5000P,5100P,5221P Hitachi Chemical EB EBR-9,-900 Toray EB SEPIRShinetsu Chemical EB

[0166] Moreover, the first to sixth embodiments have exemplified casesin which a single layer or two layers of photosensitive insulating filmsare interpolated between the lower-layer interconnections 13, 14 and theupper-layer interconnections 3, 4; however, not less than three layersof photosensitive insulating films may be interpolated.

[0167] Furthermore, in the first to sixth embodiments, the interlayerinsulating film 11 is shown as a single layer; however, the interlayerinsulating film 11 may have a structure to be interpolated between thelower-layer interconnections 13, 14 and the upper-layer interconnections3, 4 in the first to sixth embodiments. In other words, the interlayerinsulating film 11 may have a photosensitive property, or may beconstituted by a single layer or not less than two layers ofphotosensitive insulating films, or may have a structure in which anabsorbing film is interpolated between not less than two layers ofphotosensitive insulating films.

[0168] Although the present invention has been described and illustratedin detail, it is clearly understood that the same is by way ofillustration and example only and is not to be taken by way oflimitation, the spirit and scope of the present invention being limitedonly by the terms of the appended claims.

What is claimed is:
 1. A semiconductor device comprising: a multi-layerinterconnection structure in which a lower-layer interconnection and anupper-layer interconnection are laminated with an insulating filminterpolated in between, wherein said insulating film comprises a groovefilled with said upper-layer interconnection on an upper surfacethereof, a connection hole for connecting said upper-layerinterconnection and said lower-layer interconnection, and aphotosensitive film.
 2. The semiconductor device according to claim 1,wherein the insulating film has a structure in which a lower-layerinsulating film and an upper-layer insulating film that are exposed tomutually different wavelengths are laminated, and said connection holeis formed in said lower-layer insulating film and said groove is formedon said upper-layer insulating film.
 3. The semiconductor deviceaccording to claim 2, wherein a wavelength to which said lower-layerinsulating film is exposed is set to be shorter than a wavelength towhich said upper-layer insulating film is exposed.
 4. The semiconductordevice according to claim 1, wherein said insulating film has astructure in which a lower-layer insulating film and an upper-layerinsulating film that have mutually different sensitivities arelaminated, and said connection hole is formed in said lower-layerinsulating film and said groove is formed in said upper-layer insulatingfilm.
 5. The semiconductor device according to claim 4, wherein thesensitivity that said lower-layer insulating film is exposed is set tobe lower than the sensitivity that said upper-layer insulating film isexposed.
 6. The semiconductor device according to claim 1, wherein saidinsulating film is formed to a structure in which a lower-layerinsulating film and an upper-layer insulating film that are exposed tomutually different exposure sources are laminated, and said connectionhole is formed in said lower-layer insulating film and said groove isformed in said upper-layer insulating film.
 7. The semiconductor deviceaccording to claim 6, wherein said lower-layer insulating film isexposed to two kinds of exposure sources, and said upper-layerinsulating film is exposed to any one of the two kinds of exposuresources.
 8. The semiconductor device according to claim 1, wherein saidinsulating film has a structure in which a first photosensitiveinsulating film, an exposure source absorption film and a secondphotosensitive insulating film are laminated in succession, and saidconnection hole is formed in said first photosensitive insulating filmand said groove is formed on said second photosensitive insulating film.9. The semiconductor device according to claim 1, wherein saidinsulating film is formed by a single layer.
 10. The semiconductordevice according to claim 5, wherein said connection hole is formed soas to be located only within an area below said groove.
 11. Thesemiconductor device according to claim 10, wherein the width of saidgroove and the aperture width of said connection hole are set to bevirtually the same, and the side wall of said groove and the side wallof said connection hole constitute a virtually continuous surface.
 12. Amanufacturing method of a semiconductor device, which is a method forforming a semiconductor device having a multi-layer interconnectionstructure in which a lower-layer interconnection and an upper-layerinterconnection are laminated with an insulating film interpolated inbetween, characterized in that: after said insulating film having aphotosensitive property has been exposed, developing said insulatingfilm so that a groove for filling with said upper-layer interconnectionis formed on the upper surface and a connection hole for connecting saidupper-layer interconnection and the lower-layer interconnection isformed below said groove.
 13. The manufacturing method of asemiconductor device according to claim 12, wherein said insulating filmis formed to a structure in which a lower-layer insulating film and anupper-layer insulating film that are exposed to mutually differentwavelengths are laminated, and said lower-layer insulating film isexposed by a first wavelength to form said connection hole therein, andsaid upper-layer insulating film is exposed by a second wavelength thatis different from said first wavelength to form said groove therein. 14.The manufacturing method of a semiconductor device according to claim13, wherein said first wavelength is shorter than said secondwavelength.
 15. The manufacturing method of a semiconductor deviceaccording to claim 12, wherein said insulating film is formed to astructure in which a lower-layer insulating film and an upper-layerinsulating film that have mutually different sensitivities arelaminated, said lower-layer insulating film is exposed by a first doseof exposure to form said connection hole therein, and said upper-layerinsulating film is exposed by a second dose of exposure that isdifferent from said first dose of exposure to form said groove therein.16. The manufacturing method of a semiconductor device according toclaim 15, wherein said first dose of exposure is greater than saidsecond dose of exposure.
 17. The manufacturing method of a semiconductordevice according to claim 12, wherein said insulating film is formed toa structure in which a lower-layer insulating film and an upper-layerinsulating film that are exposed to mutually different exposure sourcesare laminated, said lower-layer insulating film is exposed by a firstexposure source to form said connection hole therein, and saidupper-layer insulating film is exposed by a second exposure source thatis different from said first exposure source to form said groovetherein.
 18. The manufacturing method of a semiconductor deviceaccording to claim 12, wherein said insulating film is formed to astructure in which a first photosensitive insulating film, an exposuresource absorption film and a second photosensitive insulating layer arelaminated in succession, and a first exposure forms said connection holein said first photosensitive insulating film and a second exposure formssaid groove on said second photosensitive insulating film.
 19. Themanufacturing method of a semiconductor device according to claim 12,wherein said insulating film is formed by a single photosensitiveinsulating film.
 20. The manufacturing method of a semiconductor deviceaccording to claim 19, said single photosensitive insulating film isexposed by a first dose of exposure to form said connection holetherein, and said single photosensitive insulating film is also exposedby a second dose of exposure that is different from said first dose ofexposure to form said groove thereon.